bladeRF 2.0 micro xA4

The bladeRF 2.0 micro xA4 is the next generation Software Defined Radio (SDR) that has been packed into a small form factor and was designed for high performance as well as mobile applications. This model of the bladeRF offers a frequency range of 47MHz to 6GHz, 61.44MHz sampling rate, and 2×2 MIMO streaming. Students and RF enthusiasts will find the bladeRF 2.0 micro xA4 an esy to use option to explore wireless communications, hile still providing a powerful waveform development platform expected by industry professionals.

The bladeRF 2.0 micro xA4 has been fitted with a USB 3.0 Superspeed connector and a Cypress FX3 microcontroller providing you with a high speed, low latency board with a powerful ARM9 processor and enough bandwidth to saturate the full duplex 5Gbps USB 3.0 link. An Altera Cyclone V FPGA provides the interface between the FX3 and RF transceiver for the bladeRF. This FPGA has single-cycle access embedded memory, hard 18x18 multipliers for dedicated DSP and many general logic elements ready to be programmed. All four of the RF SMA ports are capable of providing power over bias-tee circuitry to wideband amplifiers and pre-amps. The last major feature that the micro possesses is the AD9361 wideband RF transceiver from Analog devices. This transceiver is made for next generation wireless protocols, capable of handling anything from simple FM audio to the latest 5G LTE standard to whatever the future may hold.

The bladeRF 2.0 micro features support for Linux, macOS, and Windows in addition to GNU Radio via gr-osmosdr, Pothos via SoapySDR, SDRange, SDR Console, SDR# via sdrsharp-bladeRF, YateBTS, OpenAirInterface, srsUE and srsLTE, MathWorks MATLAB® & Simulink® via libbladeRF bindings.

Includes:

• 1x bladeRF 2.0 micro xA4
• 1x USB 3.0 SS Cable

Features:

• Analog Devices RF Transceiver
  • 47 MHz to 6 GHz frequency range
  • 2x2 MIMO, 61.44 MHz sampling rate
  • 56 MHz filtered bandwidth (IBW)
  • Automatic gain control (AGC)
  • Real-time custom gain control tables controlled via SPI and discrete external input pins
  • Automatic IQ and DC offset correction
  • 128-tap digital FIR filtering
• Altera Cyclone V FPGA
  • 49 kLE and 301 kLE variants available for custom signal processing and hardware accelerators
• Factory-calibrated SiTime MEMS VCTCXO
  • Calibrated within 1 Hz of 38.4 MHz
  • Taming supported via 12-bit DAC or ADF4002 PLL
  • MEMS oscillators provide superior reliability, aging, power supply noise rejection, and vibe/shock performance compared to quartz oscillators
• USB 3.0 SuperSpeed Support
  • Cypress FX3 peripheral controller with integrated 200 MHz ARM926EJ-S processor
  • Fully bus-powered over USB 3.0
  • External power option via 5V DC barrel jack with automatic switchover

Documents:

• Schematic
• Datasheet
• Support Page
• FPGA Resource Page

Videos